Start Date
14th August 2022
Duration
6 Months
Expert Trainer
Mr.Krishna
Eligibility
BE, BTech/ ME, MTech
Start Date
21/06/2021
Duration
200Hrs
Expert Trainer
AARKTECH
Eligibility
BTECH/BE

Career
Counselling

Start Date
14th August 2022
Duration
6 Months
Expert Trainer
Mr.Krishna
Eligibility
BE, BTech/ ME, MTech
Start Date
21/06/2021
Duration
200Hrs
Expert Trainer
AARKTECH
Eligibility
BTECH/BE
Design and Verification is a ASIC VLSI front-end course designed and delivered by trainers from the Semiconductor Industry as per the current technologies and requirements from the industry. This course emphasizes on ASIC Design Flow, CMOS fundamentals, Advanced Digital Design, Verilog fundamentals, RTL Design using Verilog and System Verilog. Synthesis using industry standard tools RTL Verification using Verilog and System Verilog covers Basics, Oops, assertion based verification, Functional Coverage. Universal Verification methodologies. Every module is delivered with multiple projects to create a competitive spirit in the trainees.
Located in the Silicon Valley of India, Bangalore. AARK IC Technologies RTL Design courses, Emphasises on structured learning, Keeping in mind the current industry trends Our Engineers are extensively trained on Design methodologies using Verilog, System Verilog(SV). Universal verification Methodologies(UVM) are widely used for verifying complex system designs. AARK IC’s RTL Design & Verification course is a blend of design and verification concepts available in Online and classroom mode training, with 24/7 Lab access. During the course, our engineers get hands-on experience on the Bus protocols, Industry-standard tools, and projects.
Digital Design Basics
Advanced Digital Design
CMOS Basics
Verilog HDL
RTL Design using VERILOG HDL along with Project
RTL Design using System Verilog HDL
RTL Verification using VERILOG HDL
System Verilog Basics
Verification using System Verilog
UVM Structural Overview
Learn from India’s leading EDA TOOLS, faculty and industry leaders
Trainer
Venkata Krishna, Has immense experience of 20 years in training postgraduate and graduate students in the academics and in the semiconductor industry. In the last 4+ years He has been instrumental in training 1000+ students in both frontend and Backend of the VLSI design. His research area is in the field of Analog Circuit Design. He is passionate about training the students and the engineers in the semiconductor industry to upgrade their skills.
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